With the application of high voltage device in integrated circuit wider and wider, the requirement of antistatic ability for the high voltage device is higher and higher. Most of the conventional external antistatic devices are implemented using silicon controlled structure (SCR), and characteristics of the structure vary with the different process.
A conventional LDMOS-SCR electrostatic protection structure has a deficiency that it is easy to cause a punch through between a drain terminal (i.e., P+ of an anode) and a source terminal (i.e., a high voltage P-well of a cathode), such that an internal circuit is easy to be affected, thereby resulting in breakdown voltage (BV) decreased, and a working voltage cannot meet the original design.